Download Cryptographic Hardware and Embedded Systems – CHES 2014: by Lejla Batina, Matthew Robshaw PDF

By Lejla Batina, Matthew Robshaw

This ebook constitutes the court cases of the sixteenth foreign Workshop on Cryptographic and Embedded platforms, CHES 2014, held in Busan, South Korea, in September 2014. The 33 complete papers integrated during this quantity have been conscientiously reviewed and chosen from 127 submissions. they're geared up in topical sections named: side-channel assaults; new assaults and buildings; countermeasures; set of rules particular SCA; ECC implementations; implementations; implementations of symmetric cryptosystems; PUFs; and RNGs and SCA matters in hardware.

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Read or Download Cryptographic Hardware and Embedded Systems – CHES 2014: 16th International Workshop, Busan, South Korea, September 23-26, 2014. Proceedings PDF

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Extra resources for Cryptographic Hardware and Embedded Systems – CHES 2014: 16th International Workshop, Busan, South Korea, September 23-26, 2014. Proceedings

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Training products of experts by minimizing contrastive divergence. Neural Computation 14(8), 1771–1800 (2002) 11. : A generative bayesian model for aggregating experts’ probabilities. In: Proceedings of the 20th Conference on Uncertainty in Artificial Intelligence, pp. 301–308. AUAI Press (2004) 12. : Differential power analysis. In: Wiener, M. ) CRYPTO 1999. LNCS, vol. 1666, pp. 388–397. Springer, Heidelberg (1999) 13. : Power Analysis Attacks: Revealing the Secrets of Smart Cards (Advances in Information Security).

Thus, the x2i registries and hence xti registries contain 2562 records each. If we naively use the xti registries as input for a dual-input constraint X4 to compute the XOR of four values - it means that x4 registry will contain 2564 records, which is prohibitive. We note that by the time we reach the xti registry the probability assigned to each record is conflated over 6 side channel leaks: 2 AddRoundKey bytes, 2 SubBytes bytes, a single x2 byte and a single xtime byte. Therefore, the conflated probabilities of incorrect key bytes have dropped significantly.

Note that our analysis could be easily extended to the general case where each leakage Lj has its own dimension Tj . 2 Higher-Order Side-Channel Attacks In a higher-order side-channel attack (HO-SCA), the adversary aims to extract information about k ∗ by monitoring the leakage of the shares. Specifically, the adversary observes several samples i ∈ L of the leakage Lxi ,k∗ , corresponding to some public input xi that he may either choose or just know. According to the above leakage model, the leakage space L is defined as L = RT ×(d+1) and each leakage sample can be written as i =( i,0 , i,1 , · · · , i,d ) , (8) How to Estimate the Success Rate of Higher-Order Side-Channel Attacks 39 with i,j ∈ RT for every j.

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