By Wooi Ming Tan
This brand-new ebook is a step by step advisor to constructing common Serial Bus (USB) units. Wooi Ming Tan, a key participant within the improvement of USB, offers easy-to-understand directions for making a USB gadget utilizing the Intel 8x930AX USB Microcontroller review package. you will get whole USB process part descriptions with synopses of the USB Specification rev. 1.0, improvement instruments and setting, USB microcontroller structure and its firmware working version, WDM and USB equipment motive force versions, and USB host program software program. to hurry your layout and improvement method, we have incorporated pattern code for a WDM motive force, the USB microcontroller firmware, and the host program software program at the enclosed disk. no matter if you are new to USB or already within the layout technique, constructing USB computing device Peripherals will give you the info you must effectively flow ahead together with your new USB peripheral.
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Extra info for Developing Usb PC Peripherals
Note that the time interval between any two SOF packets is 1 ms, for example there is an 1 ms period between packet #178 and packet #179. As shown above, each USB frame of 1 ms (between SOFs) is boxed together to display the single frames. In the 1 ms period starting by the packet #179, the host sends out a SETUP token (packet #180) and 8 bytes of setup data (packet #181) to a device. These eight bytes of data specify what type of request the host wants from the device. The first byte specifies the characteristic of the request.
The device, after the correct reception of this setup data, issues an ACK handshake packet (packet #182) immediately. Note that all of these transfers take place within 1 ms, between SOF packet #179 and SOF packet #183. Since the host requests to get data from the device, it will send an IN token after the setup packet, as shown in the USB frame starting with 19 USB Protocol by Transfer Types packet #183. The device responds with the data the host requested. This is the beginning of the data stage of the control transfer.
46 Step 3: Developing The Device Hardware Mnemonic Description IPH1 Interrupt Priority High Register 1 . To establish relative priority for programmable interrupts. It is used in conjunction with IPL1 . PCON1 To store the USB suspend, resume, reset flags. These flags will be set accordingly when there is a USB suspend, resume, and reset. RXCNTH Receive FIFO Byte Count High Register. To store the MSB byte count for the data packets received in the receive FIFO specified by EPINDEX. RXCNTL Receive FIFO Byte Count Low Register.